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XC95288XL High Performance CPLD
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DS055 (v1.4) March 19, 2001
Product Specification cations and computing systems. It is comprised of 16 54V18 Function Blocks, providing 6,400 usable gates with propagation delays of 6 ns. See Figure 2 for architecture overview.
Features
* * * * 6 ns pin-to-pin logic delays System frequency up to 208 MHz 288 macrocells with 6,400 usable gates Available in small footprint packages - 144-pin TQFP (117 user I/O pins) - 208-pin PQFP (168 user I/O pins) - 256-pin BGA (192 user I/O pins) - 256-pin FBGA (192 user I/O pins) - 280-pin CSP (192 user I/O pins) Optimized for high-performance 3.3V systems - Low power operation - 5V tolerant I/O pins accept 5V, 3.3V, and 2.5V signals - 3.3V or 2.5V output capability - Advanced 0.35 micron feature size CMOS FastFLASHTM technology Advanced system features - In-system programmable - Superior pin-locking and routability with FastCONNECT IITM switch matrix - Extra wide 54-input Function Blocks - Up to 90 product-terms per macrocell with individual product-term allocation - Local clock inversion with three global and one product-term clocks - Individual output enable per output pin with local inversion - Input hysteresis on all user and boundary-scan pin inputs - Bus-hold circuitry on all user pin inputs - Full IEEE Standard 1149.1 boundary-scan (JTAG) Fast concurrent programming Slew rate control on individual outputs Enhanced data security features Excellent quality and reliability - Endurance exceeding 10,000 program/erase cycles - 20 year data retention - ESD protection exceeding 2,000V Pin-compatible with 5V-core XC95288 device in the 208-pin HQFP package
Power Estimation
Power dissipation in CPLDs can vary substantially depending on the system frequency, design application and output loading. To help reduce power dissipation, each macrocell in a XC9500XL device may be configured for low-power mode (from the default high-performance mode). In addition, unused product-terms and macrocells are automatically deactivated by the software to further conserve power. For a general estimate of ICC, the following equation may be used: ICC (mA) = MCHP(0.5) + MCLP(0.3) + MC(0.0045 mA/MHz) f Where: MCHP = Macrocells in high-performance (default) mode MCLP = Macrocells in low-power mode MC = Total number of macrocells used f = Clock frequency (MHz) This calculation is based on typical operating conditions using a pattern of 16-bit up/down counters in each Function Block with no output loading. The actual ICC value varies with the design application and should be verified during normal system operation. Figure 1 shows the above estimation in a graphical form.
450 400 350
*
*
208 MHz
Typical ICC (mA)
* * * *
300 250
Hig
200 150
hP
er
m for
an
ce
94 MHz
L
100 50 0
P ow
ow
er
*
50
100
150
200
250
Description
The XC95288XL is a 3.3V CPLD targeted for high-performance, low-voltage applications in leading-edge communi-
Clock Frequency (MHz)
DS055_01_101300
Figure 1: Typical ICC vs. Frequency for XC95288XL
(c) 2001 Xilinx, Inc. All rights reserved. All Xilinx trademarks, registered trademarks, patents, and disclaimers are as listed at http://www.xilinx.com/legal.htm. All other trademarks and registered trademarks are the property of their respective owners. All specifications are subject to change without notice.
DS055 (v1.4) March 19, 2001 Product Specification
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XC95288XL High Performance CPLD
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3 JTAG Port 1
JTAG Controller
In-System Programming Controller
54 I/O I/O I/O FastCONNECT II Switch Matrix I/O 54 18 18
Function Block 1 Macrocells 1 to 18
Function Block 2 Macrocells 1 to 18
I/O Blocks I/O I/O I/O I/O 3 I/O/GCK 1 I/O/GSR 4 I/O/GTS
54 18
Function Block 3 Macrocells 1 to 18
54 18
Function Block 4 Macrocells 1 to 18
54 18
Function Block 16 Macrocells 1 to 18
DS055_02_101300
Figure 2: XC95288XL Architecture Function Block outputs (indicated by the bold line) drive the I/O Blocks directly.
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DS055 (v1.4) March 19, 2001 Product Specification
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XC95288XL High Performance CPLD
Absolute Maximum Ratings
Symbol VCC VIN VTS TSTG TSOL TJ Description Supply voltage relative to GND Input voltage relative to GND(1) Voltage applied to 3-state output(1) Value -0.5 to 4.0 -0.5 to 5.5 -0.5 to 5.5 -65 to +150 +260 +150 Units V V V
oC oC oC
Storage temperature (ambient) Maximum soldering temperature (10s @ 1/16 in. = 1.5 mm) Junction temperature
Notes: 1. Maximum DC undershoot below GND must be limited to either 0.5V or 10 mA, whichever is easier to achieve. During transitions, the device pins may undershoot to -2.0 V or overshoot to +7.0V, provided this over- or undershoot lasts less than 10 ns and with the forcing current being limited to 200 mA. 2. Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those listed under Operating Conditions is not implied. Exposure to Absolute Maximum Ratings conditions for extended periods of time may affect device reliability.
Recommended Operation Conditions
Symbol VCCINT VCCIO VIL VIH VO Parameter Supply voltage for internal logic and input buffers Commercial TA = Industrial TA = 0oC to to 70oC +85oC -40oC Min 3.0 3.0 3.0 2.3 0 2.0 0 Max 3.6 3.6 3.6 2.7 0.80 5.5 VCCIO Units V V V V V V V
Supply voltage for output drivers for 3.3V operation Supply voltage for output drivers for 2.5V operation Low-level input voltage High-level input voltage Output voltage
Quality and Reliability Characteristics
Symbol TDR NPE VESD Data Retention Program/Erase Cycles (Endurance) Electrostatic Discharge (ESD) Parameter Min 20 10,000 2,000 Max Units Years Cycles Volts
DC Characteristic Over Recommended Operating Conditions
Symbol VOH VOL IIL IIH CIN ICC Parameter Output high voltage for 3.3V outputs Output high voltage for 2.5V outputs Output low voltage for 3.3V outputs Output low voltage for 2.5V outputs Input leakage current I/O high-Z leakage current I/O capacitance Operating supply current (low power mode, active) Test Conditions IOH = -4.0 mA IOH = -500 A IOL = 8.0 mA IOL = 500 A VCC = Max VIN = GND or VCC VCC = Max VIN = GND or VCC VIN = GND f = 1.0 MHz VI = GND, No load f = 1.0 MHz Min 2.4 90% VCCIO 85 (Typical) Max 0.4 0.4 10 10 10 Units V V V V A A pF mA
DS055 (v1.4) March 19, 2001 Product Specification
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XC95288XL High Performance CPLD
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AC Characteristics
XC95288XL-6 Symbol TPD TSU TH TCO fSYSTEM TPSU TPH TPCO TOE TOD TPOE TPOD TAO TPAO TWLH TPLH Parameter I/O to output valid I/O setup time before GCK I/O hold time after GCK GCK to output valid Multiple FB internal operating frequency I/O setup time before p-term clock input I/O hold time after p-term clock input P-term clock output valid GTS to output valid GTS to output disable Product term OE to output enabled Product term OE to output disabled GSR to output valid P-term S/R to output valid GCK pulse width (High or Low) P-term clock pulse width (High or Low) Min 4.0 0.0 1.0 2.6 2.4 6.0 Max 6.0 3.8 208.3 6.8 4.5 4.5 8.4 8.4 10.8 11.8 XC95288XL-7 Min 4.8 0.0 1.6 3.2 4.0 6.5 Max 7.5 4.5 125.0 7.7 5.0 5.0 9.5 9.5 12.0 12.6 XC95288XL-10 Min 6.5 0.0 2.1 4.4 4.5 7.0 Max 10.0 5.8 100.0 10.2 7.0 7.0 11.0 11.0 14.5 15.3 Units ns ns ns ns MHz ns ns ns ns ns ns ns ns ns ns ns
VTEST
R1 Device Output R2 CL
Output Type
VCCIO 3.3V 2.5V
VTEST 3.3V 2.5V
R1 320 250
R2 360 660
CL 35 pF 35 pF
DS058_03_081500
Figure 3: AC Load Circuit
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DS055 (v1.4) March 19, 2001 Product Specification
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XC95288XL High Performance CPLD
Internal Timing Parameters
XC95288XL-6 Symbol Buffer Delays TIN TGCK TGSR TGTS TOUT TEN Input buffer delay GCK buffer delay GSR buffer delay GTS buffer delay Output buffer delay Output buffer enable/disable delay Product Term Control Delays TPTCK TPTSR TPTTS TPDI TSUI THI TECSU TECHO TCOI TAOI TRAI TLOGI TLOGILP TF TPTA TPTA2 TSLEW Product term clock delay Product term set/reset delay Product term 3-state delay 2.0 1.0 6.2 2.4 1.4 7.2 2.7 1.8 7.5 ns ns ns 2.2 1.2 2.2 4.5 2.4 0.0 2.3 1.5 3.1 5.0 2.5 0.0 3.5 1.8 4.5 7.0 3.0 0.0 ns ns ns ns ns ns Parameter Min Max XC95288XL-7 Min Max XC95288XL-10 Min Max Units
Internal Register and Combinatorial Delays Combinatorial logic propagation delay Register setup time Register hold time Register clock enable setup time Register clock enable hold time Register clock to output valid time Register async. S/R to output delay Register async. S/R recover before clock Internal logic delay Internal low power logic delay FastCONNECT II feedback delay 2.0 1.6 2.0 1.6 6.0 1.0 5.5 1.6 0.4 0.2 6.2 2.6 2.2 2.6 2.2 7.5 1.4 6.4 3.5 1.3 0.5 6.4 3.0 3.5 3.0 3.5 10.0 1.8 7.3 4.2 1.7 1.0 7.0 ns ns ns ns ns ns ns ns ns ns ns
Feedback Delays
Time Adders Incremental product term allocator delay (first incremental delay) Incremental product term allocator delay (subsequent incremental delay) Slew-rate limited delay 0.8 0.3 3.5 0.8 0.3 4.0 1.0 0.4 4.5 ns ns ns
DS055 (v1.4) March 19, 2001 Product Specification
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XC95288XL High Performance CPLD
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XC95288XL I/O Pins
Function MacroBScan Block cell TQ144 PQ208 BG256 FG256 CS280 Order Function Block Macrocell BScan TQ144 PQ208 BG256 FG256 CS280 Order
1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18
- - - - 20 21 - 22 - 23 - 24 - 25 26 - 27 - - 9 10 - 11 12 - 13 - 14 - 15 - 16 17 - 19 -
- 28 29 - 30 31 - 32 - 33 - 34 - 35 36 - 37 - - 15 16 - 17 18 - 19 - 20 - 21 - 22 23 - 25 -
- L1 L2 - L3 L4 - M1 M2 M3 M4 N1 - N2 N3 - N4 - - G2 G1 - H4 H3 - H2 H1 J4 J3 J2 - J1 K2 - K1 -
- H1 H5 - J1 J5 - J2 J3 K1 J4 K2 - K5 L1 - K3 - - D1 G4 - E1 G3 - G2 F5 F1 G5 H2 - H4 G1 - H3 -
- K2 K3 - K4 L1 - L2 L3 L4 M1 M2 - M3 M4 - N1 - - G3 G2 - G1 G4 - H1 H3 H2 H4 J1 - J2 J3 - J4 -
861 858 855 852 849 846 843 840 837 834 831 828 825 822 819 816 813 810 807 804 801 798 795 792 789 786 783 780 777 774 771 768 765 762 759 756
3 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3 4 4 4 4 4 4 4 4 4 4 4 4 4 4 4 4 4 4
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18
- 28 - - - - - - - 30(1) - 31 - 32(1) 33 - - - - 2(1) - - 3(1) 4 - 5(1) - - - 6(1) - 7 - - - -
- 38 39 - 40 41 - 43 - 44(1) - 45 - 46(1) 47 - 48 - - 3(1) 4 - 5(1) 6 - 7(1) - 8 - 9(1) - 10 12 - 14 -
- P1 R1 - P3 R2 - P4 R3 T2(1) U1 T3 - U2(1) V1 - T4 - - C2(1) D2 - D3(1) E4 - C1(1) D1 E3 E2 E1(1) - F3 F2 - G3 -
- L2 L5 - M1 L4 - N1 L3 M2(1) M4 P1 - M3(1) N2 - N4 - - D3(1) D2 - E3(1) C2 - D4(1) B1 E4 C1 E5(1) - E2 F2 - E6 -
- N2 P1 - P2 P3 - P4 R1 R3(1) R2 R4 - T1(1) T2 - T3 - - C2(1) B1 - C1(1) D4 - D3(1) D2 D1 E3 E2(1) - E4 F3 - F4 -
753 750 747 744 741 738 735 732 729 726 723 720 717 714 711 708 705 702 699 696 693 690 687 684 681 678 675 672 669 666 663 660 657 654 651 648
Notes: 1. Global control pin.
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DS055 (v1.4) March 19, 2001 Product Specification
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XC95288XL High Performance CPLD
XC95288XL I/O Pins (Continued)
Function MacroBScan Block cell TQ144 PQ208 BG256 FG256 CS280 Order Function Block Macrocell BScan TQ144 PQ208 BG256 FG256 CS280 Order
5 5 5 5 5 5 5 5 5 5 5 5 5 5 5 5 5 5 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18
- 34 - - 35 - - 38(1) - 39 - 40 - 41 43 - 44 - - 135 136 - 137 138 - 139 - 140 - - - 142 143(1) - - -
- 49 50 - 51 54 - 55(1) - 56 - 57 - 58 60 - 61 - - 197 198 - 199 200 - 201 - 202 - 203 - 205 206(1) - 208 -
- U3 V2 - V3 Y2 - W4(1) V4 U5 Y3 Y4 - V5 V6 - U7 - - D7 C6 - B5 A4 - C5 B4 A3 D5 C4 - B2 A2(1) - C3 -
- R1 N3 - P2 P4 - P5(1) T2 N5 R4 M5 - R5 R6 - N6 - - A5 D6 - B5 C6 - A4 E7 A3 C5 A2 - B4 C4(1) - B3 -
- U1 V1 - U2 V3 - W2(1) W3 T4 U4 V4 - W4 V5 - T5 - - D7 A6 - B6 C6 - D6 A5 C5 B5 D5 - B4 C4(1) - A3 -
645 642 639 636 633 630 627 624 621 618 615 612 609 606 603 600 597 594 591 588 585 582 579 576 573 570 567 564 561 558 555 552 549 546 543 540
7 7 7 7 7 7 7 7 7 7 7 7 7 7 7 7 7 7 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18
- - 45 - 46 - - - - - - 48 - - 49 - - - 130 131 - 132 - - 133 - 134 - - - - - - - -
- 62 63 - 64 66 - 67 - 69 - 70 - 71 72 - 73 - - 186 187 - 188 189 - 191 - 192 - 193 - 194 195 - 196 -
- W6 Y6 - V7 U8 - W7 Y7 V8 W8 Y8 - U9 V9 - W9 - - A9 B9 - C9 D9 - A8 B8 C8 D8 A7 - B7 B6 - A5 -
- R3 M6 - T3 T4 - P7 T5 N7 R7 M7 - T6 N8 - T7 - - E11 A8 - C8 B8 - D8 A7 E9 B7 D7 - A6 B6 - E8 -
- W5 U6 - V6 W6 - U7 V7 W7 T7 W8 - U8 V8 - T8 - - B10 C10 - D10 A9 - B9 C9 D9 A8 B8 - C8 B7 - C7 -
537 534 531 528 525 522 519 516 513 510 507 504 501 498 495 492 489 486 483 480 477 474 471 468 465 462 459 456 453 450 447 444 441 438 435 432
Notes: 1. Global control pin.
DS055 (v1.4) March 19, 2001 Product Specification
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XC95288XL High Performance CPLD
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XC95288XL I/O Pins (Continued)
Function MacroBScan Block cell TQ144 PQ208 BG256 FG256 CS280 Order Function Block Macrocell BScan TQ144 PQ208 BG256 FG256 CS280 Order
9 9 9 9 9 9 9 9 9 9 9 9 9 9 9 9 9 9 10 10 10 10 10 10 10 10 10 10 10 10 10 10 10 10 10 10
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18
- 50 51 - 52 53 - 54 - - 56 57 - 58 - - 59 - - 117 118 - 119 120 - 121 - 124 125 126 - 128 - - 129 -
- 74 75 - 76 77 - 78 - 80 82 83 - 84 85 - 86 - - 170 171 - 173 174 - 175 - 178 179 180 - 182 183 - 185 -
- Y11 W11 - V11 U11 - Y12 W12 V12 U12 Y13 - W13 V13 - W14 - - A14 C13 - B13 A13 - D12 C12 A12 B11 C11 - B10 C10 - D10 -
- R8 P8 - T8 M8 - T9 P9 R9 M9 T10 - M10 R10 - T11 - - B11 D11 - A11 D10 - B10 E12 F12 B9 C9 - A9 D9 - E10 -
- U9 T9 - W10 V10 - U10 W11 V11 U11 T11 - W12 V12 - T12 - - C14 B14 - A14 C13 - B13 A13 A12 C12 B12 - B11 C11 - A10 -
429 426 423 420 417 414 411 408 405 402 399 396 393 390 387 384 381 378 375 372 369 366 363 360 357 354 351 348 345 342 339 336 333 330 327 324
11 11 11 11 11 11 11 11 11 11 11 11 11 11 11 11 11 11 12 12 12 12 12 12 12 12 12 12 12 12 12 12 12 12 12 12
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18
- - 60 - 61 - - - - 64 66 68 - 69 - - 70 - - 110 111 - 112 - - 113 - 115 - 116 - - - - - -
- 87 88 - 89 90 - 91 - 95 97 99 - 100 101 - 102 - - 158 159 - 160 161 - 162 - 164 165 166 - 167 168 - 169 -
- Y15 V14 - W15 Y16 - U14 Y17 V16 Y18 V17 - Y19 V18 - W19 - - B18 C17 - D16 A18 - A17 C16 A16 C15 D14 - B15 A15 - C14 -
- P10 T12 - N10 T13 - M11 N11 T14 R12 T15 - R14 N13 - R13 - - B13 B14 - C13 A15 - C12 B12 D13 A14 E13 - A13 C11 - A12 -
- W13 V13 - U13 T13 - W14 T14 W15 V15 W16 - U16 W17 - W18 - - B19 B18 - B17 A18 - A17 D16 C16 B16 A16 - C15 B15 - D15 -
321 318 315 312 309 306 303 300 297 294 291 288 285 282 279 276 273 270 267 264 261 258 255 252 249 246 243 240 237 234 231 228 225 222 219 216
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DS055 (v1.4) March 19, 2001 Product Specification
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XC95288XL High Performance CPLD
XC95288XL I/O Pins (Continued)
Function MacroBScan Block cell TQ144 PQ208 BG256 FG256 CS280 Order Function Block Macrocell BScan TQ144 PQ208 BG256 FG256 CS280 Order
13 13 13 13 13 13 13 13 13 13 13 13 13 13 13 13 13 13 14 14 14 14 14 14 14 14 14 14 14 14 14 14 14 14 14 14
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18
- 71 - - - - - 74 - - 75 - - 76 77 - 78 - - - 100 - 101 102 - 103 - 104 105 - - 106 107 - - -
- 103 106 - 107 109 - 110 - 111 112 113 - 114 115 - 116 - - 144 145 - 146 147 - 148 - 149 150 151 - 152 154 - 155 -
- Y20 V19 - U19 T17 - V20 U20 T18 T19 R18 - P17 R20 - P18 - - G19 F19 - E20 G17 - F18 E19 D20 E18 D19 - C20 D18 - C18 -
- P13 P15 - N14 R16 - N15 M15 M13 P16 N16 - M14 L15 - L13 - - F15 E15 - F13 D16 - F14 C16 E14 D15 G12 - C15 D14 - B16 -
- V17 U18 - V19 U19 - T16 T17 T18 T19 R18 - R16 R19 - P17 - - G19 G16 - F19 F18 - F17 F16 E19 E17 E18 - E16 D18 - D17 -
213 210 207 204 201 198 195 192 189 186 183 180 177 174 171 168 165 162 159 156 153 150 147 144 141 138 135 132 129 126 123 120 117 114 111 108
15 15 15 15 15 15 15 15 15 15 15 15 15 15 15 15 15 15 16 16 16 16 16 16 16 16 16 16 16 16 16 16 16 16 16 16
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18
- 79 80 - - - - 81 - 82 83 85 - 86 87 - 88 - - 91 92 - 93 94 - 95 - 96 97 98 - - - - - -
- 117 118 - 119 120 - 121 - 122 123 125 - 126 127 - 128 - - 131 133 - 134 135 - 136 - 137 138 139 - 140 142 - 143 -
- P19 P20 - N17 N18 - N19 N20 M17 M18 M20 - L19 L18 - L20 - - K19 K18 - K17 J20 - J19 J18 J17 H20 H19 - H18 H17 - G20 -
- M12 M16 - K14 L16 - K13 K15 L12 K16 J14 - J15 J13 - J16 - - K12 J12 - H15 H14 - G16 H13 G15 H16 F16 - H12 E16 - G14 -
- P16 P19 - N17 N18 - N19 N16 M19 M17 M16 - L19 L18 - L17 - - L16 K18 - K17 K16 - J19 J18 J17 J16 H19 - H18 H17 - H16 -
105 102 99 96 93 90 87 84 81 78 75 72 69 66 63 60 57 54 51 48 45 42 39 36 33 30 27 24 21 18 15 12 9 6 3 0
DS055 (v1.4) March 19, 2001 Product Specification
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XC95288XL High Performance CPLD
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XC95288XL Global, JTAG and Power Pins
Pin Type I/O/GCK1 I/O/GCK2 I/O/GCK3 I/O/GTS1 I/O/GTS2 I/O/GTS3 I/O/GTS4 I/O/GSR TCK TDI TDO TMS VCCINT 3.3V TQ144 30 32 38 5 6 2 3 143 67 63 122 65 8, 42, 84, 141 PQ208 44 46 55 7 9 3 5 206 98 94 176 96 11, 59, 124, 153, 204 BG256 T2 U2 W4 C1 E1 C2 D3 A2 U16 W16 B12 W17 F1, P2, W5, Y9, V10, U13, W18, T20, M19, F20, E17, B17, B14, A10, C7, B3, G4 FG256 M2 M3 P5 D4 E5 D3 E3 C4 P12 R11 A10 N12 CS280 R3 T1 W2 D3 E2 C2 C1 C4 T15 U14 D13 U15
F4, F7, G6, H6, J6, E1, F2, N3, U5, W9, K6, L7, F8, L8, F9, V9, U12, V16, R17, L9, F10, L10, G11, M18, G18, D19, H11, J11, K11 C18, A15, A11, D8, A4 C3, F1, K1, N4, V2 T6, T10, V14, V18, P18, K19, G17, C19, D14, D12, D11, A7
VCCIO 2.5V/3.3 V 1, 37, 55, 73, 109, 1, 26, 53, 65, 79, 127 92, 105, 132, 157, 172, 181, 184
D4, D6, D11, D15, F3, K4, D5, F6, L6, P6, C7, N9, C10, D17, F4, F17, K4, L17, R4, R17, U4, F11, L11, P11, D12, U6, U10, U15, U17 G13, L14
GND
18, 29, 36, 47, 62, 72, 89, 90, 99, 108, 114, 123, 144
A1, A16, C14, T1, E5, F5, G5, H5, J5, B1, K3, T1, Y5, 2, 13, 24, 27, 42, B2, B15, R2, C3, K5, L5, M5, N5, R5, W10, Y10, Y14, 52, 68, 81, 93, 104,1 08, 129, V15, U18, R19, K20, P3, G7, H7, J7, K7, R6, R7, R8, R9 R10, R11, R12, R13, G8, H8, J8, K8, G9, G18, B16, D13, 130, 141, 156, R14, R15, P15, H9, J9, K9, G10, A11, A6, J9, J10, 163, 177, 190, J11, J12, K9, K10, H10, J10, K10, P14, N15, M15, L15, K15, 207 J15, H15, G15, F15, R15, T16 K11, K12, L9, L10, E15, E14, E13, E12, L11, L12, M9, M10, E11, E10, E9, E8, M11, M12 E7, E6, P5 - A1, A19, A20, B19, B20, C19, W1, W2, W3, W20, Y1 A1, B2, W1, U3, W19, U17, A19, C17, A2, B3
No Connects
-
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DS055 (v1.4) March 19, 2001 Product Specification
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XC95288XL High Performance CPLD
Ordering Information
Example:
Device Type Speed Grade
XC95288XL -6 TQ 144 C
Temperature Range Number of Pins Package Type
Device Ordering Options
Speed -10 -7 -6 10 ns pin-to-pin delay 7.5 ns pin-to-pin delay 6 ns pin-to-pin delay TQ144 PQ208 BG256 FG256 CS280 Package 144-pin Thin Quad Flat Pack (TQFP) 208-pin Plastic Quad Flat Pack (PQFP) 256-pin Plastic Ball Grid Array (BGA) 256-pin Plastic Fine-Pitch Ball Grid Array (FBGA) 280-pin Chip Scale Package (CSP) Temperature C = Commercial I = Industrial TA = 0C to +70C TA = -40C to +85C
Component Availability
Pins Type Code
XC95288XL
144 Plastic TQFP TQ44 -10 -7 -6 C, I C C
208 Plastic PQFP PQ208 C, I C C
256 Plastic BGA BG256 C, I C C
256 Plastic FBGA FG256 C, I C C
280 Plastic CSP CS280 C, I C C
Notes: 1. C = Commercial (TA = 0oC to +70oC); I = Industrial (TA = -40oC to +85oC).
Revision History
The following table shows the revision history for this document. Date 09/28/98 02/05/99 06/07/99 02/08/01 03/19/01 Version 1.0 1.1 1.2 1.3 1.4 Initial Xilinx release. Updateed pinouts to reflect BG256 (replaces BG352). Added -7 speed and CS280 package. Updated -6 AC and timing parameters, added FG256 package. Pinout corrections. Revision
DS055 (v1.4) March 19, 2001 Product Specification
www.xilinx.com 1-800-255-7778
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